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Standard-Compliant Decimal Floating Point
By:Ghada El Guindy
Published on 2012 by LAP Lambert Academic Publishing

Most computers today support binary floating-point in hardware. While suitable for many purposes, it should not be used for financial, commercial and user-centric applications or web services because the decimal data used in these applications cannot be represented exactly using binary floating-point. The problems of binary floating-point can be avoided by using base 10 (decimal) exponents and preserving those exponents where possible. The design performs addition and subtraction on 64-bit operands in a single path adder with exception handling fulfilling the released standard and it can easily be extended to also support operations on 128-bit decimal floating-point numbers. The overall performance of the decimal adder was compared from the point of view of area and speed for the same FPGA families. We synthesized the design for two families of Xilinx, Spartan II and Vertix II. Complete test and verification is performed on all the design versions fulfilling 3063 test vectors supplied by IBM Corp. and supporting 7 rounding modes (5 stated by the standard and 2 proposed by IBM) with exception handling for overflow, inexact and invalid operations.

This Book was ranked at 39 by Google Books for keyword Float.

Book ID of Standard-Compliant Decimal Floating Point's Books is 3giPtgAACAAJ, Book which was written byGhada El Guindyhave ETAG "3PJRZEPnIRw"

Book which was published by LAP Lambert Academic Publishing since 2012 have ISBNs, ISBN 13 Code is 9783847343561 and ISBN 10 Code is 3847343564

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